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intel_code_t.h
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/*
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* Copyright 2016 Veselin Georgiev,
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* anrieffNOSPAM @ mgail_DOT.com (convert to gmail)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file contains a list of internal codes we use in detection. It is
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* of no external use and isn't a complete list of intel products.
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*/
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CODE(NA),
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CODE(NO_CODE),
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CODE(PENTIUM),
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CODE(MOBILE_PENTIUM),
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CODE(XEON),
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CODE(XEON_IRWIN),
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CODE(XEONMP),
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CODE(XEON_POTOMAC),
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CODE(XEON_I7),
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CODE(XEON_GAINESTOWN),
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CODE(XEON_WESTMERE),
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CODE(MOBILE_PENTIUM_M),
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CODE(CELERON),
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CODE(MOBILE_CELERON),
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CODE(NOT_CELERON),
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CODE(CORE_SOLO),
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CODE(MOBILE_CORE_SOLO),
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CODE(CORE_DUO),
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CODE(MOBILE_CORE_DUO),
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CODE(WOLFDALE),
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CODE(MEROM),
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CODE(PENRYN),
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CODE(QUAD_CORE),
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CODE(DUAL_CORE_HT),
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CODE(QUAD_CORE_HT),
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CODE(MORE_THAN_QUADCORE),
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CODE(PENTIUM_D),
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CODE(ATOM),
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CODE(ATOM_SILVERTHORNE),
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CODE(ATOM_DIAMONDVILLE),
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CODE(ATOM_PINEVIEW),
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CODE(ATOM_CEDARVIEW),
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CODE(CORE_I3),
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CODE(CORE_I5),
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CODE(CORE_I7),
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CODE(CORE_IVY3),
/* 22nm Core-iX */
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CODE(CORE_IVY5),
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CODE(CORE_IVY7),
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CODE(CORE_HASWELL3),
/* 22nm Core-iX, Haswell */
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CODE(CORE_HASWELL5),
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CODE(CORE_HASWELL7),
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CODE(CORE_BROADWELL3),
/* 14nm Core-iX, Broadwell */
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CODE(CORE_BROADWELL5),
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CODE(CORE_BROADWELL7),
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CODE(CORE_SKYLAKE3),
/* 14nm Core-iX, Skylake */
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CODE(CORE_SKYLAKE5),
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CODE(CORE_SKYLAKE7),
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